General Information                                                             
Processor Name:                                                                 Intel Core i5-2300
Original Processor Frequency:                                                   2800.0 MHz

CPU ID:                                                                         000206A7
CPU Brand Name:                                                                 Intel(R) Core(TM) i5-2300 CPU @ 2.80GHz
CPU Vendor:                                                                     GenuineIntel
CPU Stepping:                                                                   D2
CPU Code Name:                                                                  Sandy Bridge-DT
CPU Technology:                                                                 32 nm
CPU S-Spec:                                                                     SR00D
CPU Thermal Design Power (TDP):                                                 95.0 W
CPU IA Cores Thermal Design Current (TDC):                                      113.5 A
CPU GT Cores Thermal Design Current (TDC):                                      35.5 A
CPU Power Limits (Max):                                                         Power = 120.00 W, Time = 1.00 sec
CPU Power Limit 1 - Long Duration:                                              Power = 95.00 W, Time = 1.00 sec [Locked]
CPU Power Limit 2 - Short Duration:                                             Power = 950.00 W, Time = Unlimited [Locked]
CPU Max. Junction Temperature (Tj,max):                                         99 C
CPU Type:                                                                       Production Unit
CPU Platform:                                                                   Socket H2 (LGA1155)
Microcode Update Revision:                                                      2D

Number of CPU Cores:                                                            4
Number of Logical CPUs:                                                         4

Operating Points                                                                
CPU LFM (Minimum):                                                              1600.0 MHz = 16 x 100.0 MHz
CPU HFM (Base):                                                                 2800.0 MHz = 28 x 100.0 MHz
CPU Turbo Max:                                                                  3100.0 MHz = 31 x 100.0 MHz [Locked]
Turbo Ratio Limits:                                                             31x (1c), 30x (2-3c), 29x (4c)
CPU Current:                                                                    2895.9 MHz = 29 x 99.9 MHz @ 1.2960 V

CPU Bus Type:                                                                   Intel Direct Media Interface (DMI) v2.0
Maximum DMI Link Speed:                                                         5.0 GT/s
Current DMI Link Speed:                                                         5.0 GT/s
Number of Overclocking Bins:                                                    4

Cache and TLB                                                                   
L1 Cache:                                                                       Instruction: 4 x 32 KBytes, Data: 4 x 32 KBytes
L2 Cache:                                                                       Integrated: 4 x 256 KBytes
L3 Cache:                                                                       6 MBytes
Instruction TLB:                                                                2MB/4MB Pages, Fully associative, 8 entries
Data TLB:                                                                       4 KB Pages, 4-way set associative, 64 entries

Standard Feature Flags                                                          
FPU on Chip                                                                     Present
Enhanced Virtual-86 Mode                                                        Present
I/O Breakpoints                                                                 Present
Page Size Extensions                                                            Present
Time Stamp Counter                                                              Present
Pentium-style Model Specific Registers                                          Present
Physical Address Extension                                                      Present
Machine Check Exception                                                         Present
CMPXCHG8B Instruction                                                           Present
APIC On Chip / PGE (AMD)                                                        Present
Fast System Call                                                                Present
Memory Type Range Registers                                                     Present
Page Global Feature                                                             Present
Machine Check Architecture                                                      Present
CMOV Instruction                                                                Present
Page Attribute Table                                                            Present
36-bit Page Size Extensions                                                     Present
Processor Number                                                                Not Present
CLFLUSH Instruction                                                             Present
Debug Trace and EMON Store                                                      Present
Internal ACPI Support                                                           Present
MMX Technology                                                                  Present
Fast FP Save/Restore (IA MMX-2)                                                 Present
Streaming SIMD Extensions                                                       Present
Streaming SIMD Extensions 2                                                     Present
Self-Snoop                                                                      Present
Multi-Threading Capable                                                         Present
Automatic Clock Control                                                         Present
IA-64 Processor                                                                 Not Present
Signal Break on FERR                                                            Present
Virtual Machine Extensions (VMX)                                                Present
Safer Mode Extensions (Intel TXT)                                               Not Present
Streaming SIMD Extensions 3                                                     Present
Supplemental Streaming SIMD Extensions 3                                        Present
Streaming SIMD Extensions 4.1                                                   Present
Streaming SIMD Extensions 4.2                                                   Present
AVX Support                                                                     Present
Fused Multiply Add (FMA)                                                        Not Present
Carryless Multiplication (PCLMULQDQ)/GFMUL                                      Present
CMPXCHG16B Support                                                              Present
MOVBE Instruction                                                               Not Present
POPCNT Instruction                                                              Present
XSAVE/XRSTOR/XSETBV/XGETBV Instructions                                         Present
XGETBV/XSETBV OS Enabled                                                        Present
Float16 Instructions                                                            Not Present
AES Cryptography Support                                                        Present
Random Number Read Instruction (RDRAND)                                         Not Present
Extended xAPIC                                                                  Not Present
MONITOR/MWAIT Support                                                           Present
Thermal Monitor 2                                                               Present
Enhanced SpeedStep Technology                                                   Present
L1 Context ID                                                                   Not Present
Send Task Priority Messages Disabling                                           Present
Processor Context ID                                                            Present
Direct Cache Access                                                             Not Present
TSC-deadline Timer                                                              Present
Performance/Debug Capability MSR                                                Present
IA32 Debug Interface Support                                                    Not Present
64-Bit Debug Store                                                              Present
CPL Qualified Debug Store                                                       Present
Extended Feature Flags                                                          
64-bit Extensions                                                               Present
RDTSCP and TSC_AUX Support                                                      Present
1 GB large page support                                                         Not Present
No Execute                                                                      Present
SYSCALL/SYSRET Support                                                          Not Present
Bit Manipulation Instructions Set 1                                             Not Present
Bit Manipulation Instructions Set 2                                             Not Present
Advanced Vector Extensions 2 (AVX2)                                             Not Present
Advanced Vector Extensions 512 (AVX-512)                                        Not Present
AVX-512 Prefetch Instructions                                                   Not Present
AVX-512 Exponential and Reciprocal Instructions                                 Not Present
AVX-512 Conflict Detection Instructions                                         Not Present
AVX-512 Doubleword and Quadword Instructions                                    Not Present
AVX-512 Byte and Word Instructions                                              Not Present
AVX-512 Vector Length Extensions                                                Not Present
AVX-512 52-bit Integer FMA Instructions                                         Not Present
Secure Hash Algorithm (SHA) Extensions                                          Not Present
Software Guard Extensions (SGX) Support                                         Not Present
Supervisor Mode Execution Protection (SMEP)                                     Not Present
Supervisor Mode Access Prevention (SMAP)                                        Not Present
Hardware Lock Elision (HLE)                                                     Not Present
Restricted Transactional Memory (RTM)                                           Not Present
Memory Protection Extensions (MPX)                                              Not Present
Read/Write FS/GS Base Instructions                                              Not Present
Enhanced Performance String Instruction                                         Not Present
INVPCID Instruction                                                             Not Present
RDSEED Instruction                                                              Not Present
Multi-precision Add Carry Instructions (ADX)                                    Not Present
PCOMMIT Instructions                                                            Not Present
CLFLUSHOPT Instructions                                                         Not Present
CLWB Instructions                                                               Not Present
TSC_THREAD_OFFSET                                                               Not Present
Platform Quality of Service Monitoring (PQM)                                    Not Present
Platform Quality of Service Enforcement (PQE)                                   Not Present
FPU Data Pointer updated only on x87 Exceptions                                 Not Present
Deprecated FPU CS and FPU DS                                                    Not Present
Intel Processor Trace                                                           Not Present
PREFETCHWT1 Instruction                                                         Not Present
AVX-512 Vector Bit Manipulation Instructions                                    Not Present
AVX-512 Vector Bit Manipulation Instructions 2                                  Not Present
AVX-512 Galois Fields New Instructions                                          Not Present
AVX-512 Vector AES                                                              Not Present
AVX-512 Vector Neural Network Instructions                                      Not Present
AVX-512 Bit Algorithms                                                          Not Present
AVX-512 Carry-Less Multiplication Quadword (VPCLMULQDQ)                         Not Present
AVX-512 Vector POPCNT (VPOPCNTD/VPOPCNTQ)                                       Not Present
User-Mode Instruction Prevention                                                Not Present
Protection Keys for User-mode Pages                                             Not Present
OS Enabled Protection Keys                                                      Not Present
Wait and Pause Enhancements (WAITPKG)                                           Not Present
Total Memory Encryption                                                         Not Present
Read Processor ID                                                               Not Present
Cache Line Demote                                                               Not Present
MOVDIRI: Direct Stores                                                          Not Present
MOVDIR64B: Direct Stores                                                        Not Present
SGX Launch Configuration                                                        Not Present
AVX-512 4 x Vector Neural Network Instructions Word Variable Precision          Not Present
AVX-512 4 x Fused Multiply Accumulation Packed Single Precision                 Not Present
Fast Short REP MOV                                                              Not Present
Platform Configuration (PCONFIG)                                                Not Present

Enhanced Features                                                               
Thermal Monitor 1:                                                              Supported, Enabled
Thermal Monitor 2:                                                              Supported, Enabled
Enhanced Intel SpeedStep (GV3):                                                 Supported, Enabled
Bi-directional PROCHOT#:                                                        Enabled
Extended Auto-HALT State C1E:                                                   Enabled
MLC Streamer Prefetcher                                                         Supported, Enabled
MLC Spatial Prefetcher                                                          Supported, Enabled
DCU Streamer Prefetcher                                                         Supported, Enabled
DCU IP Prefetcher                                                               Supported, Enabled
Intel Dynamic Acceleration (IDA) Technology:                                    Not Supported
Intel Dynamic FSB Switching:                                                    Not Supported
Intel Turbo Boost Technology:                                                   Supported, Enabled
Programmable Ratio Limits:                                                      Not Supported
Programmable TDC/TDP Limits:                                                    Supported, Disabled
Hardware Duty Cycling:                                                          Not Supported

CPU SNB Features                                                                
Internal Graphics:                                                              Supported
2 DIMMS per Channel:                                                            Supported
VT-d:                                                                           Not Supported
ECC:                                                                            Not Supported
DDR3 Frequency Support:                                                         667 MHz (DDR3-1333)

Memory Ranges                                                                   
Maximum Physical Address Size:                                                  36-bit (64 GBytes)
Maximum Virtual Address Size:                                                   48-bit (256 TBytes)
MTRRs                                                                           
Range 0-200000000 (0MB-8192MB) Type:                                            Write Back (WB)
Range 200000000-240000000 (8192MB-9216MB) Type:                                 Write Back (WB)
Range C0000000-100000000 (3072MB-4096MB) Type:                                  Uncacheable (UC)
Range 23E000000-240000000 (9184MB-9216MB) Type:                                 Uncacheable (UC)
